The packing density of components in integrated circuits is continuously increasing in the course of advancing miniaturization in semiconductor technology. In order to avoid undesirable interactions between the components, the quality of the isolation of the components among one another is an important aspect of process development.
Besides the traditional LOCOS technique (Local Oxidation of Silicon), STI technology (Shallow Trench Isolation) has been developed for large scale integrated semiconductor chips. In STI technology, trenches are etched into the substrate and are filled with dielectric material. STI structures are typically used in MOS and CMOS technology in order to provide an isolation between adjacent components.
As the packing density increases, the width of these isolation trenches also decreases and their aspect ratio (ratio of height to width) increases. Consequently, filling the isolation trenches becomes more difficult, cavities may be produced in the isolating filling material, as a result of which their isolation property is impaired and thus adversely affects the yield and quality of the product.
The deposition of silicon oxide with the aid of an HDP-CVD process (high density plasma chemical vapor deposition) is known as a method for filling isolation trenches having a high aspect ratio (up to approximately 3:1). As a result of the high plasma density, this process also has a sputtering component in addition to the deposition, as a result of which dense insulation layers can be obtained with good setting of the deposition/sputtering ratio. Numerous modifications of this method are known for obtaining a dense filling (see, for example, U.S. Patent Application Publication No. 2002/0187655, which is incorporated herein by reference). In the transition to sub-100 nm technology, this method nevertheless increasingly poses difficulties with regard to cavity- and seam-free filling of the isolation trenches.
Another isolation possibility consists in realizing the filling process with flowable materials such as, for example, spin-on glass (SOG). Disadvantages of this method are a shrinkage occurring in the filling material and also a necessary complicated aftertreatment (densification, breaking, annealing, etc.).
As an alternative to filling isolation trenches having a very high aspect ratio in the course of 70 nm development, consideration is given to the so-called SelOx method (see, EP 1 178 528, and “SelOx—A Simple Shallow Trench Isolation for 0.25μ Design Rules and below”, Siemens Development Report 11/1998, which are incorporated herein by reference), which is based on a selective growth process of silicon oxide on silicon with respect to silicon oxide and nitride. The SelOx method exhibits very good filling properties.
However, the advantages are also opposed by three fundamental disadvantages or problems of the SelOx method. First, after the formation of the isolation trenches, silicon is uncovered in the latter both at the bottom and at the walls. Therefore, the selective oxide grows not only proceeding from the bottom of the trench but also from the sidewalls of the trench. As a result, a seam can form and, at the boundaries between pad nitride and silicon, the SelOx projects upward beyond the later isolation trench, which results in problems in the further process implementation on account of a differing and difficult-to-control etching behavior.
Second, if the isolation trenches are used for isolating DRAM memory cells with trench capacitors, for example, then at those locations at which the isolation trench intersects the trench capacitor, the oxide collar, the so-called collar oxide, is incipiently cut at the upper wall regions of the trench capacitors. Consequently, silicon dioxide rather than silicon is uncovered at these locations, on which silicon dioxide the SelOx exhibits an inhibited growth and tends toward cavity formation in the further course of the growth.
Third, since the isolation trench is severely damaged at the surface directly after the standard RIE etching (reactive ion etching), it is conventional to provide, before the trench is filled with oxide, a thermal oxidation step for annealing or eliminating its damage, in particular with regard to a good leakage and storage behavior of the components. Since uncovered silicon is required for the SelOx method, however, this so-called AA oxidation (oxidation of the sidewalls of the STI trench) has hitherto been effected after the filling of the trench, which, however, entails risks with regard to layer stresses and the quality of the oxide.